DE3170205D1 - Digital phase/frequency control circuit - Google Patents
Digital phase/frequency control circuitInfo
- Publication number
- DE3170205D1 DE3170205D1 DE8181110300T DE3170205T DE3170205D1 DE 3170205 D1 DE3170205 D1 DE 3170205D1 DE 8181110300 T DE8181110300 T DE 8181110300T DE 3170205 T DE3170205 T DE 3170205T DE 3170205 D1 DE3170205 D1 DE 3170205D1
- Authority
- DE
- Germany
- Prior art keywords
- control circuit
- frequency control
- digital phase
- digital
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S331/00—Oscillators
- Y10S331/02—Phase locked loop having lock indicating or detecting means
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP81110300A EP0081598B1 (de) | 1981-12-10 | 1981-12-10 | Digitale Phasen/Frequenzregelschaltung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3170205D1 true DE3170205D1 (en) | 1985-05-30 |
Family
ID=8188062
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181110300T Expired DE3170205D1 (en) | 1981-12-10 | 1981-12-10 | Digital phase/frequency control circuit |
Country Status (4)
Country | Link |
---|---|
US (1) | US4517529A (en]) |
EP (1) | EP0081598B1 (en]) |
JP (1) | JPS58150331A (en]) |
DE (1) | DE3170205D1 (en]) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4890072A (en) * | 1988-02-03 | 1989-12-26 | Motorola, Inc. | Phase locked loop having a fast lock current reduction and clamping circuit |
DE3909200C2 (de) * | 1989-03-21 | 1995-02-09 | Hella Kg Hueck & Co | Einrichtungen zur Taktsignalaufbereitung für eine taktgesteuerte Schaltungsanordnung |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3701039A (en) * | 1968-10-28 | 1972-10-24 | Ibm | Random binary data signal frequency and phase compensation circuit |
US4138650A (en) * | 1972-05-15 | 1979-02-06 | Anderson Scott K | Phase lock loop |
GB1481786A (en) * | 1974-09-13 | 1977-08-03 | Farnell Instr Ltd | Frequency control circuits |
US3988696A (en) * | 1975-11-28 | 1976-10-26 | The Bendix Corporation | Phase lock detector for digital frequency synthesizer |
JPS5273659A (en) * | 1975-12-16 | 1977-06-20 | Sanyo Electric Co Ltd | Frequency synthesizer |
US4151473A (en) * | 1977-11-18 | 1979-04-24 | Harris Corporation | Phase detector circuit |
DE2856211A1 (de) * | 1978-12-27 | 1980-07-03 | Licentia Gmbh | Digitale phasenregelschaltung mit einer hilfsschaltung |
DE2932049A1 (de) * | 1979-08-07 | 1981-02-12 | Rohde & Schwarz | Frequenz- und phasengeregelter hochfrequenzoszillator |
-
1981
- 1981-12-10 DE DE8181110300T patent/DE3170205D1/de not_active Expired
- 1981-12-10 EP EP81110300A patent/EP0081598B1/de not_active Expired
-
1982
- 1982-11-16 US US06/442,056 patent/US4517529A/en not_active Expired - Fee Related
- 1982-12-09 JP JP57214753A patent/JPS58150331A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
EP0081598A1 (de) | 1983-06-22 |
JPS58150331A (ja) | 1983-09-07 |
JPH021459B2 (en]) | 1990-01-11 |
EP0081598B1 (de) | 1985-04-24 |
US4517529A (en) | 1985-05-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |